TSMC 3nm trial production this year! Compatible with 5nm, 7nm 100% IP!

Wafer foundry leader TSMC’s new 3-nanometer fab in Nanke was launched at the end of November last year, creating another advanced process milestone. The equipment supply chain recently revealed that TSMC’s new 3-nanometer plant is scheduled to open in July and August this year, and relevant suppliers must prepare the machine and prepare for the machine before the middle of this year. In the second half of the year), there are about 20,000 to 30,000 pieces per month, and the average monthly production capacity in the first year of mass production is about 55,000 pieces, and after 2023, it will reach 105,000 pieces.

According to TSMC’s previous statement, 3nm is expected to be mass-produced in the second half of 2022, and the annual production capacity is expected to exceed 600,000 12-inch wafers. The supply chain revealed that at present, 3nm is preparing to leave the RD stage and enter the mini-line. As usual, Apple will grab the top spot, and TSMC will also fully support it. And AMD is also expected to follow, and Intel also has cooperation plans in progress.

The supply chain also revealed that the 3nm process will follow the “family model” of 7nm (7nm, 7nm enhanced, 6nm), 5nm (5nm, 5nm enhanced, 4nm), with customers at the same process node The existing design infrastructure can be used to achieve 100% IP compatibility, which can accelerate product innovation and time-to-market. At present, TSMC is also planning a 2.5nm (or 3+) process, and it is estimated that mass production in the second half of 2023.

Industry insiders said that 3 nanometers is a key battle for Taiwan and South Korea’s foundry duo, and the tactics of the two powerhouses are quite different. Samsung will directly use GAA (surround gate structure), while TSMC chooses to follow the FINFET (fin field effect transistor) architecture for 3nm, and only introduces the MBCFET architecture based on GAA technology at 2nm. He believes that in the existing architecture Seeking breakthroughs to reduce process variation is relatively cost-effective.

He further pointed out that although 3nm still uses FINFET, the technology level and investment amount are much higher than in the past, and the challenges are not small. Therefore, TSMC is also more active in production capacity planning than 5nm, which not only reflects the strong demand from large customers, We also hope that customers can stay longer in the 3-nanometer generation and be fully prepared for the next-generation 2-nanometer.

In addition, although rival Samsung is working hard to perfect the process, trying to catch up with TSMC, but given that TSMC has a good grasp of EUV and made good progress, this trend is unlikely to change in the foreseeable future. (Reference reading: The same EUV lithography machine, why only TSMC can achieve high mass production? Unique stunt: only a few dusts fall from 10,000 wafers!)

Industry sources pointed out that the production roadmap for the large-scale process after the 5nm process currently offered by TSMC is considered as follows: (Note: Between 5nm+ and 3nm, the 4nm process is planned to be inserted as the third-generation 5nm process, but mass production Time unknown.)

5nm: Mass production begins in 2020 (production at the state-of-the-art “Fab 18” factory in Tainan)

5nm+: mass production planned to start in 2021

3nm: mass production planned to start in 2022 (Tainan factory completed, equipment put into production in 2021, risk production plan started)

3nm+: mass production planned to start in 2023

2nm: Mass production planned to start in 2024 (process development, Hsinchu factory construction, venture production planned to start in 2023)

1nm: Under R&D (Near the Hsinchu headquarters, a large R&D center called “TSMC’s Bell Labs” is under construction.)


Author: Yoyokuo